The present invention relates to semiconductor integrated circuits, and more particularly, to an output buffer having a chip level bias for driving voltages off of an integrated circuit at a level that is greater than transistor tolerances.
Advancements in semiconductor integrated circuit fabrication technology enable the geometries of semiconductor devices to be progressively reduced so that more devices can fit on a single integrated circuit. As a result, core voltages of the integrated circuits are being reduced to prevent damage to the small devices and to reduce power consumption. For example, power supplies are now being reduced from 5V to 3.3V, and from 3.3V to 2.5V.
These low voltage devices are often interconnected at a board level to TTL logic and other devices that operate at higher supply voltages of 5V or 3.3V. If no precautions are taken, an external 3.3V level signal applied to the output terminal of a 2.5V I/O buffer can cause voltage drops across the transistor devices in the I/O buffer that exceed the transistor tolerances, which can cause the gate oxide of the transistors to break down. I/O buffers are therefore being developed to interface with large voltages without exceeding the tolerance levels of the devices within the integrated circuit.